1. Field of the Invention
The present invention relates to an image formation apparatus.
2. Related Background Art
The conventional LED head has the structure shown in FIGS. 1A and 1B. In this structure, plural chips, on which LED light emission elements are arranged in an array state in one column, are arranged in a column state and the chip can form an image for one line. Here, an LED array to be used has the structure where an anode or a cathode of the LED chip is composed of a common electrode and one side generally forms a pad which can be connected to a driver. In this conventional example, the description will be given for a case where the cathode is the common electrode.
Numeral 801 denotes one of the LED chips, on which plural LED light emission elements 803 are arranged. Numeral 804 denotes connection pads, which correspond to the LED's 803, connected to driver units, which correspond to LED light emission elements of an LED chip driver 802, by wire bonding. Of course, also at the LED chip driver 802 side, connection pads 805 at the driver side, which correspond to the connection pads at the LED chip side, are provided. In the case of this LED chip, one light emission control unit is necessary for one LED light emission unit. At the LED driver side, drive control units 806 equal to the number of the LED light emission units, which can be ON/OFF controlled by an image signal, are provided.
In the above-mentioned LED array, since the light emission units have to be one-to-one connected to the driver units by the wire bonding, there occurs a complication problem to realize high integration because the wire bonding becomes a hindrance as neck portions.
As a method for realizing the high integration of the LED array, there has been known a method of using a SLED (Self-Scanning Light Emitting Diode), in which a shifting function is given to the LED array chip. For example, the SLED is disclosed in Japanese Patent Application Laid-Open Nos. 1-238962, 2-208067, 2-212170, 4-5872, 4-23367, 4-296579, and 5-84971. Also, Proceedings of the 1990 IEICE (The Institute of Electronics, Information and Communication Engineers) Spring Conference (Mar. 5, 1990) "Self-Scanning Type Light Emission Element (SLED) Using PNPN Thyristor Structure", and Japan Hard Copy 1991 "Light Emission Element Array for Optical Printer in Which Driving Circuits are Integrated" have been disclosed.
As described later, since the use of the SLED chip can extremely reduce the number of connections (wire bonding) between the light emission units and the driver units, it becomes easy to provide high integration without it being prevented because of the wire bonding neck.
As explained above, in the SLED, since light emission of the elements is successively performed in each of the chips, assuming that the number of light emission elements in one chip is defined as m, a maximum time given to perform the light emission for each light emission element becomes 1/m of the maximum time during a period of one main scanning.
However, in this manner, if a light emitting time of each light emission element is set at the maximum time, the structure of a circuit which generates a timing signal becomes more complex.